# Configuration¶

When implementing a circuit on a specific physical device, we want to be able to automatically compile operations and circuits into cycles that can be implemented with natively available gates. This is to avoid the time-consuming process of compiling circuits by hand for each device.

To facilitate integration with devices, True-Q™ defines a configuration standard that, for a particular device, specifies which gates can be implemented natively, which operations are allowed to be performed in parallel, and which sequence of gates should be used to implement a synthesized unitary.

## Specifying Gates¶

In a configuration file, users can specify native gates by providing either a unitary matrix or a list of Pauli strings with corresponding rotation angles.

When gates cannot be implemented in parallel with operations on specific other qubits, that can be specified in the config file and will be taken into account when circuits are transpiled for the system.

In this case, two CNOTs are defined, one between (0, 2) and another between (1, 2), but both of these gates also restrict the chip, in that operations cannot be performed on other qubits (highlighted in red) in parallel with these gates. This is common in practice, where some operations, such as the Cross Resonance gate, frequently have to be performed independently from other operations.

True-Q™ also allows users to define gates with variable parameters, for example:

## Sample Config File¶

The below example shows a configuration file for a device named “Test,” which is comprised of qubits (specified by the Dimension), and which will implement synthesized unitaries via a series of gates of the form [("Z", angle1), ("X", 90), ("Z", angle2), ("X", 90), ("Z", angle3)] (specified by the Mode).

Name: Test
Dimension: 2
Mode: ZXZXZ

Gate CNOT:
Matrix:
- [1, 0, 0, 0]
- [0, 1, 0, 0]
- [0, 0, 0, 1]
- [0, 0, 1, 0]
Involving:
(0, 1): (3)

Gate X(phi):
Hamiltonian:
- ["X", phi]
Involving:
(0,): ()
(1,): (4, 5, 6)
(2,): (4, 5, 6)
(5,): (7,)

Gate Y(phi):
Hamiltonian:
- ["Y", phi]
Involving:
(0,): ()
(1,): (4, 5, 6)
(2,): (4, 5, 6)
(5,): (7,)

Gate Z(phi):
Matrix:
- [1, 0]
- [0, exp(1j*phi/180*pi)]
Involving:
(0,): ()
(1,): (4, 5, 6)
(2,): (4, 5, 6)
(5,): (7,)

Gate CZ(theta, phi):
Matrix:
- [1, 0, 0, 0]
- [0, 1, 0, 0]
- [0, 0, exp(1j*phi*pi/180), 0]
- [0, 0, 0, exp(1j*(theta+phi)*pi/180)]
Involving:
(0, 2): (3)

Gate MS(phi):
Hamiltonian:
- ["XX", phi]
Involving:
(0, 1): (3)
(1, 2): (0)
(1, 4): (0, 3)

Gate Dip:
Hamiltonian:
- ["XX", 90]
- ["YY", 90]
- ["ZZ", -180]
Involving:
(0, 1): (3)
(1, 2): (0)
(1, 4): (0, 3)

Gate FSim:
Matrix:
- [1, 0, 0, 0]
- [0, cos(theta*pi/180), -1j*sin(theta*pi/180), 0]
- [0, -1j*sin(theta*pi/180), cos(theta*pi/180), 0]
- [0, 0, 0, exp(1j*phi*pi/180)]
Involving:
(0, 1): ()
(1, 2): ()
(2, 3): ()