# Streamlined Randomized Benchmarking (SRB)¶

*See* `make_srb()`

*for API documentation.*

SRB is the standard protocol for characterizing the probability of an error occurring during a gate (see arXiv:quant-ph/0503243, arXiv:quant-ph/0606161, and arXiv:1009.3639).

SRB on a single qubit can be regarded as a “Hello quantum world” program that establishes a baseline performance and verifies integration has been successful. It is useful for determining gate quality averaged over a twirling gate set both in the context gates applied in isolation (i.e. applying pulses to only one or two qubits), and in the context gates applied simultaneously on different qubits. However, there is no guaranteed relationship between gate quality as estimated by SRB and the quality of of an application quantum circuit containing those gates. This is because SRB does not capture how coherent the noise is, correlated errors between gates, and noise on or due to idling qubits. CB combined with RC will give a better assessment of circuit quality.

Note that we invert each circuit up to a random Pauli matrix to diagnose errors that are missed by always returning to the initial state (see arXiv:1901.00535).

Terms that may be returned from the analysis are as follows. These descriptions are also available via mouse-overs when running True-Q™ in a Jupyter or Colab notebook.

## Estimated Parameters¶

- \({e}_{P}\) -
The total probability that an error acts on the targeted systems during a random gate if the noise is stochastic. This probability does not include errors that only affect other systems.

The assumption that the noise is stochastic can be enforced using randomized compiling, so that the probability of an error accurately characterizes errors in circuits run using randomized compiling. The probability of an error can also be used as a heuristic for the performance of circuits run without randomized compiling, however, the resulting predictions are substantially less accurate for even small coherent or calibration errors (as a percentage of the fidelity).

The probability of an error satisfies

\[e_P = 1 - F_E = (1 + 1/d) r\]where \(F_E\) is the process fidelity (also known as the entanglement fidelity), \(d\) is the dimension of the system, and

\[r = 1 - \int d\psi \operatorname{Tr}(\psi, E(\psi))\]is the average gate infidelity. Note that the process fidelity is stable under tensor products, whereas the average gate infidelity must be converted to the process fidelity to estimate the fidelity of a tensor product of processes.

- \({p}\) -
Decay parameter of the exponential decay \(Ap^m\).

- \({A}\) -
This parameter has an ideal value of \(A=1\) and encapsulates all state preparation and measurement (SPAM) errors. It additionally contains the noise of a single random gate. Therefore, a value of less than 1 does not necessarily indicate large SPAM errors if gate errors are significant.

Saying more, running less

Historically, in implementations of RB, there has been no standard way of choosing circuit lengths, the number of random circuits per circuit length, or the number of shots per circuit. However, these values can drastically affect experiment time. True-Q™ Design minimizes experiment time using four techniques:

We reduce the number of fit parameters by introducing further randomization. This enables us to use a fit model \(A\cdot p^m\) rather than \(A\cdot p^m +B\), enabling substantially shorter circuit lengths since decorrelating \(p\) and \(B\) is no longer necessary [6].

Because of the technique and model described in (1), we can use as few as two circuit lengths to fit for the parameter of interest, \(p\).

We selectively choose sequence lengths which maximize expected information density per unit time (Coming Soon!).

We use fewer shots per circuit; as a rule-of-thumb, there is little advantage to using more than 50 shots per circuit in SRB experiments.

Compared to many implementations found in literature today, this can easily lead to calibration times that are 7x faster. In the long run, as fidelities improve and classical hardware has lower circuit transfer overhead, these improvements may become even more apparent: